﻿% N.B.: \Conclusion{} is a macro name, do not translate
\subsection{\Conclusion{}}

Rough skeleton of loop from 2 to 9 inclusive:

\lstinputlisting[caption=x86,style=customasmx86]{patterns/09_loops/skeleton_x86_2_9_optimized_EN.lst}

The increment operation may be represented as 3 instructions in non-optimized code:

\lstinputlisting[caption=x86,style=customasmx86]{patterns/09_loops/skeleton_x86_2_9_EN.lst}

If the body of the loop is short, a whole register can be dedicated to the counter variable:

\lstinputlisting[caption=x86,style=customasmx86]{patterns/09_loops/skeleton_x86_2_9_reg_EN.lst}

Some parts of the loop may be generated by compiler in different order:

\lstinputlisting[caption=x86,style=customasmx86]{patterns/09_loops/skeleton_x86_2_9_order_EN.lst}

Usually the condition is checked \IT{before} loop body, but the compiler may rearrange it in a way that
the condition is checked \IT{after} loop body.

This is done when the compiler is sure that the condition is always \IT{true} on the first iteration, 
so the body of the loop is to be executed at least once:

\lstinputlisting[caption=x86,style=customasmx86]{patterns/09_loops/skeleton_x86_2_9_reorder_EN.lst}

\myindex{x86!\Instructions!LOOP}

Using the \TT{LOOP} instruction. This is rare, compilers are not using it.
When you see it, it's a sign that this piece of code is hand-written:

\lstinputlisting[caption=x86,style=customasmx86]{patterns/09_loops/skeleton_x86_loop_EN.lst}

ARM. 

The \Reg{4} register is dedicated to counter variable in this example:

\lstinputlisting[caption=ARM,style=customasmARM]{patterns/09_loops/skeleton_ARM_EN.lst}

% TODO MIPS

